Content Addressable Memories (CAMS) are commonly used in cache and other address translation systems of high speed computing systems. Ternary Content Addressable Memories (TCAMs) are ternary state CAM cells and are commonly used for parallel search in high performance computing systems. The unit of data that is stored in a TCAM bitcell is ternary, having three possible states: logic one, logic zero, and don't care (X). To store these three states, TCAM bitcells include a pair of memory elements.
A TCAM system comprises TCAM blocks with arrays of TCAM bitcells. A TCAM system typically has a TCAM block array (M×N) that includes a plurality of rows (M) and a plurality of columns (N). Further, each row has a plurality of TCAM blocks, and each TCAM block has a plurality of TCAM bitcells. These arrays typically have vertically running bit lines and search lines for data read/sTite function and horizontal running word lines and match lines. TCAM bitcells in a column share the same bit lines and search lines, whereas the word lines and match lines are shared by cells in a row. Besides a pair of memory elements, Each TCAM bitcell includes compare circuitry.
Conventional TCAM bitcells are characterized by circuitry capable of generating a match output for each row of TCAM blocks in the TCAM bitcell thereby indicating whether any location of the array contains a data pattern that matches a query input and the identity of that location. Each TCAM bitcell typically has the ability to store a unit of data, and the ability to compare that unit of data with a unit of query input and each TCAM block has the ability to generate a match output. In a conventional parallel data search, an input keyword is placed at the search bit lines after precharging the match lines to a power supply voltage Vdd. The data in each TCAM bitcell connected to a match line is compared with this data, and if there is a mismatch in any cell connected to a match line, the match line will discharge to ground through the compare circuit of that TCAM bitcell. A compare result indication of each TCAM block in a row is combined to produce a match signal for the row to indicate whether the row of TCAM bitcells contains a stored word matching a query input. The match signals from each row in the TCAM bitcell together constitute match output signals of the array; these signals may be encoded to generate the address of matched locations or used to select data from rows of additional memory.
TCAMs have been an emerging technology for applications including packet forwarding in the networking industry and are recognized as being fast and easy to use. However, due to their inherent parallel structure and precharging required for operation, they consume high power, much higher as compared to SRAMs or DRAMs. For example, a system using four TCAMs could consume up to about 60 wats of power. This high power consumption number affects costs in at least two ways. First, it increases power supply and cooling costs. Second, it reduces port density since higher power consumption implies that fewer ports can be packed into the same space (e.g., router rack) due to cooling constraints. The power issue is one of the chief disadvantages of TCAMs over RAM based methods for forwarding. A significant contribution to the power dissipation of TCAM circuits is the relatively high power and large current pulses needed to operate the compare function circuitry (match and search line pulsing). What is needed is a new lower power TCAM design that significantly reduces power dissipation.